*** UNIX MANUAL PAGE BROWSER ***

FIZZ(10.5) FIZZ(10.5) NAME fizz - physical layout input language DESCRIPTION Fizz is a set of tools to build circuit boards from a circuit descrip- tion. This section describes the input format for the various fizz commands. Most of the UCDS tools produce files in cdl(10.5) format; these need to be converted into fizz format by fizz cvt . Concepts Types, signals and chips are identified by name. Pins are identified by name and number. A name is a string of letters, digits or any of the characters +-.$/:<=>[]_. Sometimes, the first character may not be a digit. A name may not be longer than 137 characters. The physical design consists of a board containing pin-holes. The de- scription details the positions of the pin-holes and the position and orientation of the chips. I/O connectors may beconsidered as chips with unmoveable packages. The coordinate system for the board has x increasing to the right and y increasing upwards. The origin is at the lower left corner; no coordi- nate should ever be negative. The circuit board and components mounted on it are described as rectangles. They are positioned so that their sides are parallel to one or other of the axes. Measurements are inte- gers measuring 0.001 inch. Coordinates are expressed as pairs of inte- gers separated by / with the x coordinate appearing first. All rectan- gular regions are half open; the upper and right edges are outside the rectangle. Syntax The input is a sequence of items. An item consists of a item-type fol- lowed by a number of fields. Multiple fields are indicated by a trail- ing { on the keyword line and terminated by a line containing a single } . Fields are a keyword followed by the value for that field. Cer- tain values are spread over multiple lines between {} as described above. It is sometimes necessary to provide a list of coordinates. Invariably each coordinate is associated with a numbered object (say, a pin num- ber). A one coordinate list consists of the index number followed by its coordinates as in 28 1700/2500 A series of equally spaced and consecutively numbered coordinates can be described by giving the first and last coordinates and separating the two with - as in 28 1700/2500 - 30 1900/2000 Coordinate 29 is 1800/2250. If the index numbers are equally spaced but not consecutive a step size can follow the `-' as in 12 2000/7000 -9 147 2000/1000 This describes coordinates numbered 12, 21, 30, and so on. If a letter follows the coordinate specifications, it specifies the drill to be used for the pinholes. The known drill types are A 33 B 34 C 39 D 42 E 50 F 62 G 106 H 107 I 108 J 20 K 110 L 111 M 112 N 113 O 114 P 115 Q 116 R 117 S 118 T 119 U 100 V 20 W 122 X 123 Y 124 Z 125 Items In the following descriptions, each item has a sample input defining all possible fields. Some fields are optional; mandatory fields are marked by ** which is not part of the actual input. Board{ name board_name align 1600/2000 9600/1700 1400/7100 9600/6600 layer signalside 1 plane 1 + VCC 2000 2000 8000 8000 datums 100/100 135 100/8000 45 10000/100 45 } The board name is set to board_name. The alignment points are used by wrap -s to align the board in Joe's semi-automatic wire wrapping ma- chine. All four alignment points must be given. The layer field asso- ciates a layer number with a name to be used in XY artwork output. The layer numbers 0 and 1 are the two outside layers. The plane fields represent signal planes for circuit boards. The format is layer sense signame minx miny maxx maxy. Sense is a character meaning add (+) or subtract (-) the rectangle for the signal signame. The planes can be viewed with place(10.1). Note that multiple signals can be present in one layer. The datums field sets the positions and orientations of the three datums (alignment marks for artwork). The orientation is the an- gle formed by the two squares in the datum. Package{ ** name DIP20 ** br -600 0 9600 3000 ** pins 1 20{ 1 0/0 - 10 9000/0 V 11 9000/3000 - 20 0/3000 V } drills 1 2{ 1 500/1500 - 2 8500/1500 V } keepout 0 - VCC -1000 -4000 10000 3400 plane 0 - VCC -1000 -4000 10000 3400 plane 0 + VDD -500 -3500 9500 2900 xymask clump { arbitrary XY mask stuff } } Each package definition may have an arbitrary origin. The bounding rectangle br is used for placement; the values are ll.x, ll.y, ur.x, ur.y. The drills field is for mounting bolts etc; it does not affect placement. Both the pins and drills fields take a minimum and maximum pin number. Placement of a package involves both its pins and rectan- gle. The rectangle must not intersect any other placed package, and there must be a pin-hole for each of the pins. The keepout field looks like a plane definition (the sense is always set to -). Multiwire wiring will not enter the specified plane. The plane fields are simi- lar to those in Board but are instantiated for every chip using this package. The xymask field denotes the clump name (clump) for this package and some optional XY mask input (used by artwork (10.1)). The XY mask input has leading tabs deleted, not white space, as blanks are significant to XY mask. Chip{ ** name miscinv ** type 74F240 } This simply specifies the chip type. Type{ ** name 74F240 ** pkg DIP20 tt ii3i3i3i3gi3i3i3i3iv } The tt field must have a letter for every pin of the package. Any pin whose letter is one of gvwxyz or GVWXYZ will be automatically attached to special signal 0,1,2,3,4,5 respectively. Other letters are ignored (they are used by other tools). Net port 4{ select 8 miscinv 14 syncff 13 ackff 1 } Signal nets have the net name and number of points on the item line. All other lines are simple chipname,pinnumber pairs. Net descriptions are normally produced by fizz cvt from the output of cdm or cdmglob . Route{ ** name port ** alg hand route{ ackff 1 miscinv 14 select 8 syncff 13 } } This describes the routing for net name. The algorithm must be one of tsp (normal travelling salesman), tspe (travelling salesman specifying one end), mst (minimal spanning tree), mst3 (minimal spanning tree of degree three), default (whatever is specified in the wrap command) and hand (the exact order is given). The routing is a list of chip- name,pinnumber pairs. Positions{ select 3200/2300 0 0 miscinv 4900/1700 0 0 syncff 2400/2700 0 0 } Specify the position data for each chip. Each line has the form chip- name coord orientation flags. The orientation is the number of right angles clockwise to rotate the package. The following bits in flags have a defined meaning: 4 this chip is unplaced 8 the bounding rectangle is ignored in placement 16 the pinholes are ignored in placement. 32 the names are ignored in the silk screen output. Flags should be initialised to zero. Pinholes{ 1400/6900 3200 300 10 V 6650/6900 3200 300 10 V 1600/1700 8100 1000 10/30 V 1600/2700 8100 1000 10/30 V } Each pinhole specification has the form coord lx ly spacing diam which defines a rectangular array of pin-holes with diameter of diam. The lower left corner of the rectangle is coord, and the width and height are lx,ly respectively. The pins are placed spacing apart. If spacing is of the form sx/sy, the spacings in the xandy directions are set in- dependently. Vsig 0{ name GND pins 96{ 1 1800/2100 - 16 9300/2100 A 17 1800/3100 - 32 9300/3100 A 33 1800/4100 - 48 9300/4100 A 49 1800/5100 - 64 9300/5100 A 65 1800/6100 - 80 9300/6100 A 81 1800/6700 - 96 9300/6700 A } } This defines the special signals. The special signal number follows Vsig. Pins are numbered from 1; the number of pins is given in the pins field line. A warning is given if any pins are not specified. SEE ALSO fizz(10.1) UCDS FIZZ(10.5)